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? semiconductor components industries, llc, 2001 january, 2001 rev. 3 1 publication order number: mun5111dw1t1/d mun5111dw1t1 series preferred devices dual bias resistor transistors pnp silicon surface mount transistors with monolithic bias resistor network the brt (bias resistor transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a baseemitter resistor. these digital transistors are designed to replace a single device and its external resistor bias network. the brt eliminates these individual components by integrating them into a single device. in the mun5111dw1t1 series, two brt devices are housed in the sot363 package which is ideal for lowpower surface mount applications where board space is at a premium. ? simplifies circuit design ? reduces board space ? reduces component count ? available in 8 mm, 7 inch/3000 unit tape and reel maximum ratings (t a = 25 c unless otherwise noted, common for q 1 and q 2 ) rating symbol value unit collector-base voltage v cbo 50 vdc collector-emitter voltage v ceo 50 vdc collector current i c 100 madc thermal characteristics characteristic (one junction heated) symbol max unit total device dissipation t a = 25 c derate above 25 c p d 187 (note 1.) 256 (note 2.) 1.5 (note 1.) 2.0 (note 2.) mw mw/ c thermal resistance junction-to-ambient r q ja 670 (note 1.) 490 (note 2.) c/w characteristic (both junctions heated) symbol max unit total device dissipation t a = 25 c derate above 25 c p d 250 (note 1.) 385 (note 2.) 2.0 (note 1.) 3.0 (note 2.) mw mw/ c thermal resistance junction-to-ambient r q ja 493 (note 1.) 325 (note 2.) c/w thermal resistance junction-to-lead r q jl 188 (note 1.) 208 (note 2.) c/w junction and storage temperature range t j , t stg 55 to +150 c 1. fr4 @ minimum pad 2. fr4 @ 1.0 x 1.0 inch pad sot363 case 419b style 1 http://onsemi.com xx = device marking = (see page 2) marking diagram preferred devices are recommended choices for future use and best overall value. device marking information see specific marking information in the device marking table on page 2 of this data sheet. q 1 r 1 r 2 r 2 r 1 q 2 (1) (2) (3) (4) (5) (6) 1 2 3 6 5 4 xx
mun5111dw1t1 series http://onsemi.com 2 device marking and resistor values device package marking r1 (k) r2 (k) shipping mun5111dw1t1 sot363 0a 10 10 3000/tape & reel mun5112dw1t1 sot363 0b 22 22 3000/tape & reel mun5113dw1t1 sot363 0c 47 47 3000/tape & reel mun5114dw1t1 sot363 0d 10 47 3000/tape & reel mun5115dw1t1 (note 3.) sot363 0e 10 3000/tape & reel mun5116dw1t1 (note 3.) sot363 0f 4.7 3000/tape & reel mun5130dw1t1 (note 3.) sot363 0g 1.0 1.0 3000/tape & reel mun5131dw1t1 (note 3.) sot363 0h 2.2 2.2 3000/tape & reel mun5132dw1t1 (note 3.) sot363 0j 4.7 4.7 3000/tape & reel mun5133dw1t1 (note 3.) sot363 0k 4.7 47 3000/tape & reel mun5134dw1t1 (note 3.) sot363 0l 22 47 3000/tape & reel mun5135dw1t1 (note 3.) sot363 0m 2.2 47 3000/tape & reel mun5136dw1t1 (note 3.) sot363 0n 100 100 3000/tape & reel mun5137dw1t1 (note 3.) sot363 0p 47 22 3000/tape & reel electrical characteristics (t a = 25 c unless otherwise noted, common for q 1 and q 2 ) characteristic symbol min typ max unit off characteristics collector-base cutoff current (v cb = 50 v, i e = 0) i cbo 100 nadc collector-emitter cutoff current (v ce = 50 v, i b = 0) i ceo 500 nadc emitter-base cutoff current mun5111dw1t1 (v eb = 6.0 v, i c = 0) mun5112dw1t1 mun5113dw1t1 mun5114dw1t1 mun5115dw1t1 mun5116dw1t1 mun5130dw1t1 mun5131dw1t1 mun5132dw1t1 mun5133dw1t1 mun5134dw1t1 mun5135dw1t1 mun5136dw1t1 mun5137dw1t1 i ebo 0.5 0.2 0.1 0.2 0.9 1.9 4.3 2.3 1.5 0.18 0.13 0.2 0.05 0.13 madc collector-base breakdown voltage (i c = 10 m a, i e = 0) v (br)cbo 50 vdc collector-emitter breakdown voltage (note 4.) (i c = 2.0 ma, i b = 0) v (br)ceo 50 vdc on characteristics (note 4.) collector-emitter saturation voltage (i c = 10 ma, i e = 0.3 ma) (i c = 10 ma, i b = 5 ma) mun5130dw1t1/mun5131dw1t1 (i c = 10 ma, i b = 1 ma) mun5115dw1t1/mun5116dw1t1 mun5132dw1t1/mun5133dw1t1/mun5134dw1t1 v ce(sat) 0.25 vdc 3. new resistor combinations. updated curves to follow in subsequent data sheets. 4. pulse test: pulse width < 300 m s, duty cycle < 2.0%
mun5111dw1t1 series http://onsemi.com 3 electrical characteristics (t a = 25 c unless otherwise noted, common for q 1 and q 2 ) (continued) characteristic symbol min typ max unit on characteristics (note 5.) (continued) dc current gain mun5111dw1t1 (v ce = 10 v, i c = 5.0 ma) mun5112dw1t1 mun5113dw1t1 mun5114dw1t1 mun5115dw1t1 mun5116dw1t1 mun5130dw1t1 mun5131dw1t1 mun5132dw1t1 mun5133dw1t1 mun5134dw1t1 mun5135dw1t1 mun5136dw1t1 mun5137dw1t1 h fe 35 60 80 80 160 160 3.0 8.0 15 80 80 80 80 80 60 100 140 140 250 250 5.0 15 27 140 130 140 130 140 output voltage (on) (v cc = 5.0 v, v b = 2.5 v, r l = 1.0 k w ) mun5111dw1t1 mun5112dw1t1 mun5114dw1t1 mun5115dw1t1 mun5116dw1t1 mun5130dw1t1 mun5131dw1t1 mun5132dw1t1 mun5133dw1t1 mun5134dw1t1 mun5135dw1t1 (v cc = 5.0 v, v b = 3.5 v, r l = 1.0 k w ) mun5113dw1t1 (v cc = 5.0 v, v b = 5.5 v, r l = 1.0 k w ) mun5136dw1t1 (v cc = 5.0 v, v b = 4.0 v, r l = 1.0 k w ) mun5137dw1t1 v ol 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 vdc output voltage (off) (v cc = 5.0 v, v b = 0.5 v, r l = 1.0 k w ) (v cc = 5.0 v, v b = 0.05 v, r l = 1.0 k w ) mun5130dw1t1 (v cc = 5.0 v, v b = 0.25 v, r l = 1.0 k w ) mun5115dw1t1 mun5116dw1t1 mun5131dw1t1 mun5133dw1t1 v oh 4.9 vdc input resistor mun5111dw1t1 mun5112dw1t1 mun5113dw1t1 mun5114dw1t1 mun5115dw1t1 mun5116dw1t1 mun5130dw1t1 mun5131dw1t1 mun5132dw1t1 mun5133dw1t1 mun5134dw1t1 mun5135dw1t1 mun5136dw1t1 mun5137dw1t1 r 1 7.0 15.4 32.9 7.0 7.0 3.3 0.7 1.5 3.3 3.3 15.4 1.54 70 32.9 10 22 47 10 10 4.7 1.0 2.2 4.7 4.7 22 2.2 100 47 13 28.6 61.1 13 13 6.1 1.3 2.9 6.1 6.1 28.6 2.86 130 61.1 k w resistor ratio mun5111dw1t1/mun5112dw1t1/ mun5113dw1t1/mun5136dw1t1 mun5114dw1t1 mun5115dw1t1/mun5116dw1t1 mun5130dw1t1/mun5131dw1t1/mun5132dw1t1 mun5133dw1t1 mun5134dw1t1 mun5135dw1t1 mun5137dw1t1 r 1 /r 2 0.8 0.17 0.8 0.055 0.38 0.038 1.7 1.0 0.21 1.0 0.1 0.47 0.047 2.1 1.2 0.25 1.2 0.185 0.56 0.056 2.6 5. pulse test: pulse width < 300 m s, duty cycle < 2.0%
mun5111dw1t1 series http://onsemi.com 4 figure 1. derating curve 300 200 150 100 50 0 50 0 50 100 150 t a , ambient temperature ( c) r q ja = 490 c/w 250 p d , power dissipation (mw)
mun5111dw1t1 series http://onsemi.com 5 typical electrical characteristics e mun5111dw1t1 v in , input voltage (volts) i c , collector current (ma) h fe , dc current gain (normalized) figure 2. v ce(sat) versus i c 100 10 1 0.1 0.01 0.001 0 v in , input voltage (volts) t a =-25 c 25 c 1 2 3 4 5 6 7 8 9 10 figure 3. dc current gain figure 4. output capacitance figure 5. output current versus input voltage figure 6. input voltage versus output current 0.01 20 i c , collector current (ma) v ce(sat) , maximum collector voltage (volts) 0.1 1 0 40 50 1000 1 10 100 i c , collector current (ma) t a =75 c -25 c 100 10 0 i c , collector current (ma) 0.1 1 10 100 10 20 30 40 50 t a =-25 c 25 c 75 c 75 c i c /i b = 10 50 010 203040 4 3 1 2 v r , reverse bias voltage (volts) c ob , capacitance (pf) 0 t a =-25 c 25 c 75 c 25 c v ce = 10 v f = 1 mhz l e = 0 v t a = 25 c v o = 5 v v o = 0.2 v
mun5111dw1t1 series http://onsemi.com 6 typical electrical characteristics e mun5112dw1t1 v in , input voltage (volts) i c , collector current (ma) h fe , dc current gain (normalized) figure 7. v ce(sat) versus i c figure 8. dc current gain 1000 10 i c , collector current (ma) 100 10 1 100 figure 9. output capacitance i c , collector current (ma) 0 10 20 30 v o = 0.2 v t a =-25 c 75 c 100 10 1 0.1 40 50 figure 10. output current versus input voltage 100 10 1 0.1 0.01 0.001 0 1 2 3 4 v in , input voltage (volts) 5 6 7 8 9 10 figure 11. input voltage versus output current 0.01 v ce(sat) , maximum collector voltage (volts) 0.1 1 10 40 i c , collector current (ma) 0 20 50 75 c 25 c t a =-25 c 50 010203040 4 3 2 1 0 v r , reverse bias voltage (volts) c ob , capacitance (pf) 25 c i c /i b = 10 25 c -25 c v ce = 10 v t a =75 c f = 1 mhz l e = 0 v t a = 25 c 75 c 25 c t a =-25 c v o = 5 v
mun5111dw1t1 series http://onsemi.com 7 typical electrical characteristics e mun5113dw1t1 v in , input voltage (volts) i c , collector current (ma) h fe , dc current gain (normalized) figure 12. v ce(sat) versus i c i c , collector current (ma) 1 0.1 0.01 010203040 75 c 25 c v ce(sat) , maximum collector voltage (volts) figure 13. dc current gain 1000 100 10 1 10 100 i c , collector current (ma) -25 c figure 14. output capacitance figure 15. output current versus input voltage 100 10 1 0.1 0.01 0.001 010 25 c v in , input voltage (volts) -25 c 50 0 10203040 1 0.8 0.6 0.4 0.2 0 v r , reverse bias voltage (volts) c ob , capacitance (pf) 123456 789 figure 16. input voltage versus output current 100 10 1 0.1 0 10 20 30 40 i c , collector current (ma) t a =-25 c 25 c 75 c 50 i c /i b = 10 t a =-25 c 25 c t a =75 c f = 1 mhz l e = 0 v t a = 25 c v o = 5 v t a =75 c v o = 0.2 v
mun5111dw1t1 series http://onsemi.com 8 typical electrical characteristics e mun5114dw1t1 10 1 0.1 010 20 30 4050 100 10 1 0 246810 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 2 4 6 8101520253035404550 v r , reverse bias voltage (volts) v in , input voltage (volts) i c , collector current (ma) h fe , dc current gain (normalized) figure 17. v ce(sat) versus i c i c , collector current (ma) 020406080 v ce(sat) , maximum collector voltage (volts) figure 18. dc current gain 1 10 100 i c , collector current (ma) figure 19. output capacitance figure 20. output current versus input voltage v in , input voltage (volts) c ob , capacitance (pf) figure 21. input voltage versus output current i c , collector current (ma) 1 0.1 0.01 0.001 -25 c 25 c t a =75 c v ce = 10 v 180 160 140 120 100 80 60 40 20 0 2 4 6 8 15 20 40 50 60 70 80 90 f = 1 mhz l e = 0 v t a = 25 c 25 c i c /i b = 10 t a =-25 c t a =75 c 25 c -25 c v o = 5 v v o = 0.2 v 25 c t a =-25 c 75 c 75 c
mun5111dw1t1 series http://onsemi.com 9 typical electrical characteristics e mun5115dw1t1 figure 22. dc current gain i c , collector current (ma) 1.0 10 100 h fe , dc current gain (normalized) 1000 100 t a = 25 c v ce = 5.0 v v ce = 10 v typical electrical characteristics e mun5116dw1t1 figure 23. dc current gain i c , collector current (ma) 1.0 10 100 h fe , dc current gain (normalized) 1000 100 t a = 25 c v ce = 5.0 v v ce = 10 v
mun5111dw1t1 series http://onsemi.com 10 typical electrical characteristics e mun5136dw1t1 75 c 25 c 25 c figure 24. maximum collector voltage versus collector current figure 25. dc current gain figure 26. output capacitance figure 27. output current versus input voltage v in , input voltage (volts) v r , reverse bias voltage (volts) figure 28. input voltage versus output current i c , collector current (ma) i c , collector current (ma) 1 0.1 7 6 5 4 3 2 1 0 i c , collector current (ma) 100 10 1 100 10 1 0.01 1000 v ce(sat) , maximum collector voltage (volts) h fe , dc current gain (normalized) 1.2 0.6 60 50 40 30 20 10 0 0 c ob , capacitance (pf) 0.2 0.4 0.8 1.0 100 6 5 4 3 2 1 0 0.1 1 10 i c , collector current (ma) 10 9 8 7 100 12 10 8 6 4 2 0 1 10 18 16 14 20 v in , input voltage (volts) i c /i b = 10 75 c 25 c t a = 25 c v ce = 10 v 75 c 25 c t a = 25 c v o = 5 v v o = 0.2 v 75 c 25 c t a = 25 c f = 1 mhz i e = 0 v t a = 25 c
mun5111dw1t1 series http://onsemi.com 11 typical electrical characteristics e mun5137dw1t1 figure 29. maximum collector voltage versus collector current figure 30. dc current gain figure 31. output capacitance figure 32. output current versus input voltage v in , input voltage (volts) v r , reverse bias voltage (volts) figure 33. input voltage versus output current i c , collector current (ma) i c , collector current (ma) 1 0.1 35 30 25 20 15 10 5 0 i c , collector current (ma) 100 10 1 100 10 0.01 1000 v ce(sat) , maximum collector voltage (volts) h fe , dc current gain (normalized) 1.4 0.6 60 50 40 30 20 10 0 0 c ob , capacitance (pf) 0.2 0.4 0.8 1.0 100 6 5 4 3 2 1 0 0.001 1 10 i c , collector current (ma) 11 9 8 7 100 15 10 5 0 1 10 20 25 v in , input voltage (volts) 50 45 40 0.1 0.01 10 1.2 f = 1 mhz i e = 0 v t a = 25 c 75 c 25 c t a = 25 c v o = 5 v 75 c 25 c t a = 25 c v o = 0.2 v 75 c 25 c t a = 25 c i c /i b = 10 v ce = 10 v 75 c 25 c t a = 25 c
mun5111dw1t1 series http://onsemi.com 12 information for using the sot363 surface mount package minimum recommended footprints for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. sot363 0.5 mm (min) 0.4 mm (min) 0.65 mm 0.65 mm 1.9 mm sot363 power dissipation the power dissipation of the sot363 is a function of the pad size. this can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. power dissipation for a surface mount device is determined by t j(max) , the maximum rated junction temperature of the die, r q ja , the thermal resistance from the device junction to ambient; and the operating temperature, t a . using the values provided on the data sheet, p d can be calculated as follows: p d = t j(max) t a r q ja the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 256 milliwatts. p d = 150 c 25 c 490 c/w = 256 milliwatts the 490 c/w for the sot363 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 256 milliwatts. there are other alternatives to achieving higher power dissipation from the sot363 package. another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad ? . using a board material such as thermal clad, an aluminum core board, the power dissipation can be doubled using the same footprint. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference should be a maximum of 10 c. ? the soldering temperature and time should not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient should be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling. * soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
mun5111dw1t1 series http://onsemi.com 13 solder stencil guidelines prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. a solder stencil is required to screen the optimum amount of solder paste onto the footprint. the stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. the stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. typical solder heating profile for any given circuit board, there will be a group of control settings that will give the desired heat pattern. the operator must set temperatures for several heating zones, and a figure for belt speed. taken together, these control settings make up a heating aprofileo for that particular circuit board. on machines controlled by a computer, the computer remembers these profiles from one operating session to the next. figure 34 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. this profile will vary among soldering systems but it is a good starting point. factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. this profile shows temperature versus time. the line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. the two profiles are based on a high density and a low density board. the vitronics smd310 convection/infrared reflow soldering system was used to generate this profile. the type of solder used was 62/36/2 tin lead silver with a melting point between 177189 c. when this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. the components on the board are then heated by conduction. the circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. step 1 preheat zone 1 ramp" step 2 vent soak" step 3 heating zones 2 & 5 ramp" step 4 heating zones 3 & 6 soak" step 5 heating zones 4 & 7 spike" step 6 vent step 7 cooling 200 c 150 c 100 c 50 c time (3 to 7 minutes total) t max solder is liquid for 40 to 80 seconds (depending on mass of assembly) 205 to 219 c peak at solder joint desired curve for low mass assemblies 100 c 150 c 160 c 140 c figure 34. typical solder heating profile desired curve for high mass assemblies 170 c
mun5111dw1t1 series http://onsemi.com 14 package dimensions sot363 case 419b01 issue g notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. dim a min max min max millimeters 1.80 2.20 0.071 0.087 inches b 1.15 1.35 0.045 0.053 c 0.80 1.10 0.031 0.043 d 0.10 0.30 0.004 0.012 g 0.65 bsc 0.026 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 0.10 0.30 0.004 0.012 n 0.20 ref 0.008 ref s 2.00 2.20 0.079 0.087 v 0.30 0.40 0.012 0.016 b 0.2 (0.008) mm 123 a g v s h c n j k 654 b d 6 pl style 1: pin 1. emitter 2 2. base 2 3. collector 1 4. emitter 1 5. base 1 6. collector 2
mun5111dw1t1 series http://onsemi.com 15 notes
mun5111dw1t1 series http://onsemi.com 16 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mun5111dw1t1/d thermal clad is a trademark of the bergquist company north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland

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